The present invention relates to a saving and restoring system of a register bank, and particularly to that to be applied for controlling saving and restoring process of contents of registers, which is performed for task-switching of a microprocessor operating with a multi-task OS (Operating System).
Today, multi-programing method is well applied for improving operation efficiency of a microprocessor. In the multi-programing method, a program is divided into a plurality of tasks, namely execution units, among which an appropriate task is selected by the OS and assigned to be executed by the CPU. For the execution assignment, context of the executed task in registers used by the CPU at the moment must be saved in an external memory area and context of the assigned task must be restored into the registers read out from another external memory area where it is saved.
Referring to FIGS. 6 and 7, such conventional saving and restoring process will be described.
FIG. 6 illustrates an example of registers of a CPU provided with 32 registers R0 to R31 each having 32 bit-length. The saving and restoring of context in these registers is performed by the CPU according to commands.
FIG. 7 is a flowchart illustrating a saving and restoring process performed for assigning CPU execution to another task.
Suppose, for simplefication, that there are two tasks, task A and task B, to be executed by the CPU, and the CPU execution is to be assigned from task A to task B. Context of each of the tasks A and B is to be restored into the registers R0 to R31 of FIG. 6 and to be saved in each reserved area in a task control block.
Preparing (at step 701) for switching assignment of the task to be executed, OS obtains (at step 702) address of reserved area for the task A in the task control block. Then, the OS executes register bank save command for saving context of the task A at the obtained address of the task control block. According to the register bank saved command, the CPU stores (at step 703) contents of all of the 32 registers R0 to R31 in the area reserved for the task A of the task control block.
Then, the OS obtains (at step 704) task control block address of the task B, which is written at top of a queue of tasks waiting to be assigned listed in a memory area. The OS executes register bank restore command for restoring context of the task B saved in the task control block, according to which the CPU deploys (at step 705) data saved at the task control address in the registers from R0 to R31.
Thus, the OS exchanges context of the task A with that of the task B.
Another prior art will be described next, which is disclosed in a Japanese patent application laid open as a Provisional Publication No. 211837/'92. In the prior art, OS executes register bank saved command in the same way with the flowchart of FIG. 7, according to which the CPU saves data in the registers from the register R0 in order. However in the prior art, the data saving of each register is performed referring to value of modify bits prepared in another memory area, each of the modify bits representing status of data of each corresponding resister, turned to value `1` when data of the corresponding register is modified.
First, the CPU checks value of modify bit corresponding to the register R0. When value of the modify bit is `1`, the CPU saves contents of the register R0, because they are modified, at an address reserved for the context, incrementing the address for saving contents of the next register R1.
Then, modify bit for the register R1 being checked and found left at value `0`, the CPU performs only the address increment without saving contents of the register R1.
Thus, the CPU continues the process until the register R31, saving contents of concerning register and incrementing the address when corresponding modify bit is at value `1` and only incrementing the address when it is at value `0`.
After that, obtaining task control block address in the same way as at step 704 of FIG. 7, the OS executes register bank restore command for deploying context of the task B into the registers R0 to R31.
According to the register bank restore command, the CPU initializes all the modify bits to value `0` before restoring saved data of the task B into the registers from R0 to R31.
Thus, the OS exchanges context of the task A with that of the task B, in the prior art.
The context transfer inside a microprocessor can be performed at very high speed, but in the multi-task operation, context in the microprocessor should be saved in an external memory area and that of the assigned task should be restored into the resisters from another external memory area at every task switching, by way of an external bus of the microprocessor. As the data transfer through the external bus can not be performed at as high speed as that inside of the microprocessor, operational performance of the microprocessor is inevitably pulled down by the external access through the external bus.
Even in the prior art disclosed in the Provisional Publication No. 211837/'92, wherein at least the same number of address increments and context restorings with the number of the registers are needed, the external accesse results in a large overhead of processing time used by the OS.